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@ -32,29 +32,42 @@ fn bindgen_rocksdb() { |
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fn build_rocksdb() { |
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fn build_rocksdb() { |
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let target = var("TARGET").unwrap(); |
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let target = var("TARGET").unwrap(); |
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let speedb = cfg!(feature = "speedb"); |
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let mut config = cc::Build::new(); |
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let mut config = cc::Build::new(); |
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config |
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config |
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.cpp(true) |
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.cpp(true) |
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.include("rocksdb/include/") |
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.include(if speedb { |
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.include("rocksdb/") |
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"speedb/include/" |
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} else { |
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"rocksdb/include/" |
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}) |
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.include(if speedb { "speedb/" } else { "rocksdb/" }) |
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.file("api/c.cc") |
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.file("api/c.cc") |
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.file("api/build_version.cc") |
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.file("api/build_version.cc") |
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.define("NDEBUG", Some("1")) |
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.define("NDEBUG", Some("1")) |
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.define("LZ4", Some("1")) |
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.define("LZ4", Some("1")) |
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.include("lz4/lib/"); |
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.include("lz4/lib/"); |
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let mut lib_sources = include_str!("rocksdb/src.mk") |
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let mut lib_sources = if speedb { |
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.split_once("LIB_SOURCES =") |
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include_str!("speedb/src.mk") |
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.unwrap() |
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} else { |
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.1 |
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include_str!("rocksdb/src.mk") |
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.split_once("ifeq") |
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} |
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.unwrap() |
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.split_once("LIB_SOURCES =") |
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.0 |
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.unwrap() |
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.split('\\') |
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.1 |
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.map(str::trim) |
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.split_once("ifeq") |
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.filter(|p| !p.is_empty()) |
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.unwrap() |
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.collect::<Vec<_>>(); |
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.0 |
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.split('\\') |
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.map(str::trim) |
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.filter(|p| !p.is_empty()) |
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.collect::<Vec<_>>(); |
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if speedb { |
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config.define("SPEEDB", None); |
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} |
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if target.contains("x86_64") { |
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if target.contains("x86_64") { |
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// This is needed to enable hardware CRC32C. Technically, SSE 4.2 is
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// This is needed to enable hardware CRC32C. Technically, SSE 4.2 is
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@ -177,7 +190,11 @@ fn build_rocksdb() { |
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if file == "db/c.cc" || file == "util/build_version.cc" { |
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if file == "db/c.cc" || file == "util/build_version.cc" { |
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continue; |
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continue; |
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} |
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} |
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config.file(&format!("rocksdb/{file}")); |
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config.file(&if speedb { |
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format!("speedb/{file}") |
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} else { |
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format!("rocksdb/{file}") |
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}); |
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} |
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} |
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config.compile("rocksdb"); |
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config.compile("rocksdb"); |
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} |
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} |
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